Module sam4l::pm
[−]
[src]
Implementation of the power manager (PM) peripheral.
Reexports
use bpm; |
use bscif; |
use core::cell::Cell; |
use core::sync::atomic::Ordering; |
use flashcalw; |
use gpio; |
use kernel::common::VolatileCell; |
use scif; |
Structs
PmRegisters | |
PowerManager |
Contains state for the power management peripheral. This includes the configurations for various system clocks and the final frequency that the system is running at. |
Enums
Clock | |
HSBClock | |
MainClock | |
OscillatorFrequency |
Frequency of the external oscillator. For the SAM4L, different
configurations are needed for different ranges of oscillator frequency, so
based on the input frequency, various configurations may need to change.
When additional oscillator frequencies are needed, they should be added
here and the |
OscillatorStartup |
Configuration for the startup time of the external oscillator. In practice we have found that some boards work with a short startup time, while others need a slow start in order to properly wake from sleep. In general, we find that for systems that do not work, at fast speed, they will hang or panic after several entries into WAIT mode. |
PBAClock | |
PBBClock | |
PBCClock | |
PBDClock | |
SystemClockSource |
Which source the system clock should be generated from. These are specified as system clock source appended with the clock that it is sourced from appended with the final frequency of the system. So for example, one option is to use the DFLL sourced from the RC32K with a final frequency of 48 MHz. |
Constants
DEEP_SLEEP_HSBMASK | |
DEEP_SLEEP_PBAMASK | |
DEEP_SLEEP_PBBMASK | |
HSB_MASK_OFFSET | |
PBA_MASK_OFFSET | |
PBB_MASK_OFFSET | |
PBC_MASK_OFFSET | |
PBD_MASK_OFFSET | |
PM_BASE |
Statics
PM | |
PM_REGS |
Functions
configure_48mhz_dfll⚠ |
Configure the system clock to use the DFLL with the RC32K as the source. Run at 48 MHz. |
configure_external_oscillator⚠ |
Configure the system clock to use the 16 MHz external crystal directly |
configure_external_oscillator_pll⚠ |
Configure the system clock to use the PLL with the 16 MHz external crystal |
deep_sleep_ready |
Determines if the chip can safely go into deep sleep without preventing currently active peripherals from operating. |
disable_clock⚠ | |
enable_clock⚠ | |
get_system_frequency | |
is_clock_enabled⚠ | |
select_main_clock⚠ | |
unlock⚠ |