Struct sam4l::i2c::I2CHw
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pub struct I2CHw { registers: *mut TWIMRegisters, slave_registers: Option<*mut TWISRegisters>, master_clock: Clock, slave_clock: Option<Clock>, dma: Cell<Option<&'static DMAChannel>>, dma_pids: (DMAPeripheral, DMAPeripheral), master_client: Cell<Option<&'static I2CHwMasterClient>>, slave_client: Cell<Option<&'static I2CHwSlaveClient>>, on_deck: Cell<Option<(DMAPeripheral, usize)>>, slave_enabled: Cell<bool>, my_slave_address: Cell<u8>, slave_read_buffer: TakeCell<'static, [u8]>, slave_read_buffer_len: Cell<u8>, slave_read_buffer_index: Cell<u8>, slave_write_buffer: TakeCell<'static, [u8]>, slave_write_buffer_len: Cell<u8>, slave_write_buffer_index: Cell<u8>, }
Fields
registers: *mut TWIMRegisters
slave_registers: Option<*mut TWISRegisters>
master_clock: Clock
slave_clock: Option<Clock>
dma: Cell<Option<&'static DMAChannel>>
dma_pids: (DMAPeripheral, DMAPeripheral)
master_client: Cell<Option<&'static I2CHwMasterClient>>
slave_client: Cell<Option<&'static I2CHwSlaveClient>>
on_deck: Cell<Option<(DMAPeripheral, usize)>>
slave_enabled: Cell<bool>
my_slave_address: Cell<u8>
slave_read_buffer: TakeCell<'static, [u8]>
slave_read_buffer_len: Cell<u8>
slave_read_buffer_index: Cell<u8>
slave_write_buffer: TakeCell<'static, [u8]>
slave_write_buffer_len: Cell<u8>
slave_write_buffer_index: Cell<u8>
Methods
impl I2CHw
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const fn new(
base_addr: *mut TWIMRegisters,
slave_base_addr: Option<*mut TWISRegisters>,
master_clock: Clock,
slave_clock: Option<Clock>,
dma_rx: DMAPeripheral,
dma_tx: DMAPeripheral
) -> I2CHw
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base_addr: *mut TWIMRegisters,
slave_base_addr: Option<*mut TWISRegisters>,
master_clock: Clock,
slave_clock: Option<Clock>,
dma_rx: DMAPeripheral,
dma_tx: DMAPeripheral
) -> I2CHw
fn set_bus_speed(&self)
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Set the clock prescaler and the time widths of the I2C signals in the CWGR register to make the bus run at a particular I2C speed.
pub fn set_dma(&self, dma: &'static DMAChannel)
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pub fn set_master_client(&self, client: &'static I2CHwMasterClient)
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pub fn set_slave_client(&self, client: &'static I2CHwSlaveClient)
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pub fn handle_interrupt(&self)
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fn setup_xfer(&self, chip: u8, flags: usize, read: bool, len: u8)
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fn setup_nextfer(&self, chip: u8, flags: usize, read: bool, len: u8)
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fn master_enable(&self)
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pub fn write(&self, chip: u8, flags: usize, data: &'static mut [u8], len: u8)
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pub fn read(&self, chip: u8, flags: usize, data: &'static mut [u8], len: u8)
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pub fn write_read(
&self,
chip: u8,
data: &'static mut [u8],
split: u8,
read_len: u8
)
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&self,
chip: u8,
data: &'static mut [u8],
split: u8,
read_len: u8
)
fn disable_interrupts(&self)
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pub fn handle_slave_interrupt(&self)
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Handle possible interrupt for TWIS module.
pub fn slave_write_receive(&self, buffer: &'static mut [u8], len: u8)
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Receive the bytes the I2C master is writing to us.
pub fn slave_read_send(&self, buffer: &'static mut [u8], len: u8)
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Prepare a buffer for the I2C master to read from after a read call.
fn slave_disable_interrupts(&self)
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pub fn slave_set_address(&self, address: u8)
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pub fn slave_listen(&self)
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Trait Implementations
impl DMAClient for I2CHw
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fn xfer_done(&self, _pid: DMAPeripheral)
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impl I2CMaster for I2CHw
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fn enable(&self)
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This enables the entire I2C peripheral
fn disable(&self)
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This disables the entire I2C peripheral
fn write(&self, addr: u8, data: &'static mut [u8], len: u8)
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fn read(&self, addr: u8, data: &'static mut [u8], len: u8)
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fn write_read(
&self,
addr: u8,
data: &'static mut [u8],
write_len: u8,
read_len: u8
)
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&self,
addr: u8,
data: &'static mut [u8],
write_len: u8,
read_len: u8
)
impl I2CSlave for I2CHw
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fn enable(&self)
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fn disable(&self)
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This disables the entire I2C peripheral