Struct sam4l::i2c::I2CHw

pub struct I2CHw {
    registers: *mut TWIMRegisters,
    slave_registers: Option<*mut TWISRegisters>,
    master_clock: Clock,
    slave_clock: Option<Clock>,
    dma: Cell<Option<&'static DMAChannel>>,
    dma_pids: (DMAPeripheral, DMAPeripheral),
    master_client: Cell<Option<&'static I2CHwMasterClient>>,
    slave_client: Cell<Option<&'static I2CHwSlaveClient>>,
    on_deck: Cell<Option<(DMAPeripheral, usize)>>,
    slave_enabled: Cell<bool>,
    my_slave_address: Cell<u8>,
    slave_read_buffer: TakeCell<'static, [u8]>,
    slave_read_buffer_len: Cell<u8>,
    slave_read_buffer_index: Cell<u8>,
    slave_write_buffer: TakeCell<'static, [u8]>,
    slave_write_buffer_len: Cell<u8>,
    slave_write_buffer_index: Cell<u8>,
}

Fields

registers: *mut TWIMRegisters

slave_registers: Option<*mut TWISRegisters>

master_clock: Clock

slave_clock: Option<Clock>

dma: Cell<Option<&'static DMAChannel>>

dma_pids: (DMAPeripheral, DMAPeripheral)

master_client: Cell<Option<&'static I2CHwMasterClient>>

slave_client: Cell<Option<&'static I2CHwSlaveClient>>

on_deck: Cell<Option<(DMAPeripheral, usize)>>

slave_enabled: Cell<bool>

my_slave_address: Cell<u8>

slave_read_buffer: TakeCell<'static, [u8]>

slave_read_buffer_len: Cell<u8>

slave_read_buffer_index: Cell<u8>

slave_write_buffer: TakeCell<'static, [u8]>

slave_write_buffer_len: Cell<u8>

slave_write_buffer_index: Cell<u8>

Methods

impl I2CHw

const fn new(
    base_addr: *mut TWIMRegisters,
    slave_base_addr: Option<*mut TWISRegisters>,
    master_clock: Clock,
    slave_clock: Option<Clock>,
    dma_rx: DMAPeripheral,
    dma_tx: DMAPeripheral
) -> I2CHw

fn set_bus_speed(&self)

Set the clock prescaler and the time widths of the I2C signals in the CWGR register to make the bus run at a particular I2C speed.

pub fn set_dma(&self, dma: &'static DMAChannel)

pub fn set_master_client(&self, client: &'static I2CHwMasterClient)

pub fn set_slave_client(&self, client: &'static I2CHwSlaveClient)

pub fn handle_interrupt(&self)

fn setup_xfer(&self, chip: u8, flags: usize, read: bool, len: u8)

fn setup_nextfer(&self, chip: u8, flags: usize, read: bool, len: u8)

fn master_enable(&self)

pub fn write(&self, chip: u8, flags: usize, data: &'static mut [u8], len: u8)

pub fn read(&self, chip: u8, flags: usize, data: &'static mut [u8], len: u8)

pub fn write_read(
    &self,
    chip: u8,
    data: &'static mut [u8],
    split: u8,
    read_len: u8
)

fn disable_interrupts(&self)

pub fn handle_slave_interrupt(&self)

Handle possible interrupt for TWIS module.

pub fn slave_write_receive(&self, buffer: &'static mut [u8], len: u8)

Receive the bytes the I2C master is writing to us.

pub fn slave_read_send(&self, buffer: &'static mut [u8], len: u8)

Prepare a buffer for the I2C master to read from after a read call.

fn slave_disable_interrupts(&self)

pub fn slave_set_address(&self, address: u8)

pub fn slave_listen(&self)

Trait Implementations

impl DMAClient for I2CHw

fn xfer_done(&self, _pid: DMAPeripheral)

impl I2CMaster for I2CHw

fn enable(&self)

This enables the entire I2C peripheral

fn disable(&self)

This disables the entire I2C peripheral

fn write(&self, addr: u8, data: &'static mut [u8], len: u8)

fn read(&self, addr: u8, data: &'static mut [u8], len: u8)

fn write_read(
    &self,
    addr: u8,
    data: &'static mut [u8],
    write_len: u8,
    read_len: u8
)

impl I2CSlave for I2CHw

fn enable(&self)

fn disable(&self)

This disables the entire I2C peripheral

fn set_address(&self, addr: u8)

fn write_receive(&self, data: &'static mut [u8], max_len: u8)

fn read_send(&self, data: &'static mut [u8], max_len: u8)

fn listen(&self)

impl I2CMasterSlave for I2CHw